1. Field of the Invention
Embodiments of the present invention relate to the field of switch arrays. More particularly, embodiments of the present invention relate generally to scanning a key matrix using a reduced number of digital signals.
2. Related Art
Electronic devices require input mechanisms as an interface to provide a means for a user to interact with the electronic devices. These input mechanisms are arranged in a matrix configuration for efficiency when using a controller to scan the matrix to determine which input mechanisms are activated. To match a trend towards reducing the overall size and cost of the electronic devices, an emphasis is placed on reducing the size of the input mechanisms, the chip that contains the system controller, and the wiring that couples the matrix of input elements and the system controller.
Prior Art FIG. 1 is a schematic diagram of a system 100 that is capable of scanning a key matrix 120 to determine which of the keys in the key matrix are activated. The system 100 monitors the flow of signals to determine the activation of the keys in the key matrix 120.
The system 100 comprises a controller chip 110 coupled to a key matrix 120 via a plurality of output lines 130 and a plurality of input lines 140. The plurality of output lines 130 can be considered as rows servicing the key matrix 120. The plurality of output lines comprise row R1, R2, up to the nth row RN. The plurality of input lines 140 can be considered as columns servicing the key matrix 120. As such, the plurality of input lines comprise column C1, C2, up to the mth column CM.
The key matrix 120 comprises a plurality of switching elements (e.g. switching element 125). Each of the plurality of switching elements uniquely couples one of the plurality of output lines 130 to one of the plurality of input lines 140. As such, a switching element is identified by its associated row output line and its associated column input line. More particularly, between any of the rows and any of the columns, only one switching element is present.
In order to scan the key matrix 120, the controller chip 110 sequentially sends signals one at a time across each of the plurality of rows 130 and monitors the plurality of columns to determine if the signal returns via a circuit path completed when a corresponding switching element is activated. Depending on which of the rows a signal is sent, and which of the columns the signal is detected, the associated switching element that was activated can be determined. That is a switching element can be determined from its association with a particular row and column.
In the system 100 of Prior Art FIG. 1, the controller 110 requires N+M connections to service the key matrix 120. For example, a typical keyboard for a computer system currently sold on the market has approximately 104 keys in the key matrix 120 that are electrically coupled in a 16*9 matrix. In a better implementation of the same keyboard, an 11*10 matrix would be sufficient. In these cases, the controller chip 110 would require 25 pins (16+9) or 21 pins (11+10) in order to scan all the keys.
The system 100 of the Prior Art FIG. 1 has several manufacturing disadvantages. The system 100 requires N+M connections to service an N*M matrix. As chips become smaller and more powerful, additional pins add to the cost and complexity of manufacturing. As such, what is required is a system and method for reducing the number of pins in the controller chip 100 to scan the key matrix 120 to reduce the manufacturing costs. In addition, electronic devices can include the controller chip 110 on a separate board from the key matrix (e.g., an input panel separate from the controller chip on a video recorder) coupled together via ribbon cabling. As such, what is required is a system and method for reducing the number of wires servicing the key matrix to reduce the manufacturing costs. Also, as integrated circuit (IC) manufacturers increase the performance of IC chips, more functionality can be provided by the IC chip as accessed through the pins on the IC chip. What is required is a system and method for increasing the number of services provided by the IC chip (e.g., the number of keys in the key matrix) without increasing the number of pins on the IC chip, to reduce the manufacturing costs.